1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
|
Picardy 2020
============
A reinterpretation of the [Picardy 2m SSB transceiver](http://f6feo.homebuilder.free.fr/transceiver_PICARDY.html) by F6FEO
combined with the [Anglian 3L transverter](http://www.g4ddk.com/Products.html).
Additional inspirations: uBitx, the KN-Q7, LimeRFE and EI9GQ's "Building a Transceiver" book. Many thanks to all the
designers behind these projects.
The hardware design is licenced under the "CERN Open Hardware Licence Version 2 - Permissive", see *cern_ohl_p_v2.txt*.
The firmware is MIT-licenced.
* Designed in KiCad
* Meant to be used with a microwave transverter
* But also stand-alone 28MHz and 144MHz (The IF bands)
* Offer plug-in band-filters for other HF bands
* Using a STM32F103C8T6 controller
* Si5351 clock source (generates 3 clocks)
* An LCD display
* Discarded ideas
* Include a Lars Widenius GPSDO originally published on [eevblog](https://www.eevblog.com/forum/projects/lars-diy-gpsdo-with-arduino-and-1ns-resolution-tic/?all)
* Offer a 10MHz output refclk for a transverter
* Instead, have a 25MHz ref input, and use a LeoBodnar reference
Open questions
==============
* CW
* Does the trick with the DC bias to leak the LO work ?
* Not tested, but plan B done (J306)
* Use an additional PWM output for plan B?
* Put sidetone volume setting before RV303?
* Hook up to LM375 BYPASS?
PCB Assembly Plan
=================
1. DCDC converter for 8V and LDOs
* Check output voltages
* Check drop under load
2. STM32F103C8T6
* Programming
* Sidetone low-pass
* Probably need to do a UI proto already
3. Si5153
* Check I2C works
4. 8V and 5V relay
* Check switching with microcontroller and validate resistors
5. Baseband
1. Crystal filter shape
2. RX and TX filter shape
3. Receive path: IF mixer, crystal filter relay, IF AGC, BFO mixer, AGC measure, AF amp, SPKR
* Verify LO levels into SA602A: at least 200mVpp
4. Transmit path: Mic amp
6. Anglian
1. LO filter shape
2. LO amp. Mixer needs +7dBm
3. All passives
* Verify correct voltages for amplifiers
* Verify PIN currents (Between 20mA and 60mA, below 0.8V)
* Verify filter shapes
4. IF amplifiers, both RX and TX
5. VHF amplifiers
6. VHF bandpass filter
7. Mixer
7. External switching relay
Additional remarks
==================
* Very good [explanations](https://groups.io/g/BITX20/topic/si5351a_facts_and_myths/5430607) about DDS vs DPLL from Hans Summers
* Si5153 test before PCB fab:
* It seems the desired frequency plan can be achieved:
* clk0: LO1 = 28 - 4.9152 + VFO, i.e. from 23 to 25
* clk1: VHF-LO = 144 + 28 and 144 - 28, i.e. 116 MHz
* clk2: BFO = 4.91521
* See `freqplan.py`
* If not, generate LO1 and BFO with Si5153, and connect an external LO to the VHF LO u.FL
* No 116MHz crystals on mouser, but 114.285MHz are available, HF bandpass filters recalculated.
* Other option is using another configurable reference
|
