From 59366778836025e89550a1d641c8bd613dccaffb Mon Sep 17 00:00:00 2001
From: "Matthias P. Braendli" <matthias.braendli@mpb.li>
Date: Sat, 25 Mar 2023 22:24:51 +0100
Subject: Fix DART-70 things seen during assembly

---
 sw/dart-70/src/si_clock.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'sw')

diff --git a/sw/dart-70/src/si_clock.rs b/sw/dart-70/src/si_clock.rs
index 6de4c25..1f97a0a 100644
--- a/sw/dart-70/src/si_clock.rs
+++ b/sw/dart-70/src/si_clock.rs
@@ -107,7 +107,7 @@ impl<I2C, E> SiClock<I2C>
         I2C: WriteRead<Error = E> + Write<Error = E>,
 {
     pub fn new(i2c: I2C, bfo: u32, vfo: u32) -> SiClock<I2C> {
-        let mut siclock = Si5351Device::new(i2c, false, REF_CLOCK);
+        let mut siclock = Si5351Device::new(i2c, false);
         siclock.init(si5351::CrystalLoad::_10).unwrap();
 
         // See freqplan.py for Si5351 frequency plan
-- 
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