From ec330aa367bfb8b337df9a4f220c7909ef95e86c Mon Sep 17 00:00:00 2001 From: "Matthias P. Braendli" Date: Sun, 19 Apr 2020 20:55:24 +0200 Subject: Case edge alignment for connectors, add unused uC pins to header --- README.md | 2 ++ 1 file changed, 2 insertions(+) (limited to 'README.md') diff --git a/README.md b/README.md index c94f9d6..4ad6a71 100644 --- a/README.md +++ b/README.md @@ -15,6 +15,8 @@ combined with the [Anglian 3L transverter](http://www.g4ddk.com/Products.html). * Offer a 10MHz output refclk for a transverter * Instead, have a 25MHz ref input, and use a LeoBodnar reference +* Very good [explanations](https://groups.io/g/BITX20/topic/si5351a_facts_and_myths/5430607) about DDS vs DPLL from Hans Summers + TODO before ordering the PCB ============================ -- cgit v1.2.3