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Commit message (Collapse)AuthorAgeFilesLines
* Calculate diplexer valuesMatthias P. Braendli2023-01-291-234/+603
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* Add rx gain stageMatthias P. Braendli2023-01-241-32/+238
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* Add PA lowpass filter valuesMatthias P. Braendli2023-01-241-31/+19
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* Add RX filterMatthias P. Braendli2023-01-241-0/+42
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* Add connectors for FE, PA and ControlMatthias P. Braendli2023-01-231-619/+3471
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* Update TODOsMatthias P. Braendli2023-01-231-707/+168
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* Add PA_70Matthias P. Braendli2023-01-221-539/+1841
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* Change 70MHz filterMatthias P. Braendli2023-01-221-1242/+572
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* Add 70MHz frontendMatthias P. Braendli2023-01-211-15/+365
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* Schematic workMatthias P. Braendli2023-01-211-33/+78
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* Totally rework DART-70 basebandMatthias P. Braendli2023-01-201-606/+592
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* Update schematicMatthias P. Braendli2023-01-191-505/+526
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* Update schematicMatthias P. Braendli2023-01-181-412/+557
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* More schematic workMatthias P. Braendli2023-01-151-666/+655
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* More schematic work on DART-70Matthias P. Braendli2023-01-151-629/+3446
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* Add hybrid cascodeMatthias P. Braendli2023-01-111-17/+371
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* Add IF gain stageMatthias P. Braendli2023-01-111-22/+157
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* Do some schematic changesMatthias P. Braendli2023-01-091-53/+74
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* Add initial files for DART-70Matthias P. Braendli2023-01-081-0/+2466