| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Place and route PA | Matthias P. Braendli | 2023-02-07 | 1 | -1/+5 |
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| * | Define all footprints | Matthias P. Braendli | 2023-02-02 | 1 | -7/+30 |
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| * | Calculate diplexer values | Matthias P. Braendli | 2023-01-29 | 1 | -5/+99 |
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| * | Add rx gain stage | Matthias P. Braendli | 2023-01-24 | 1 | -4/+4 |
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| * | Add connectors for FE, PA and Control | Matthias P. Braendli | 2023-01-23 | 1 | -2/+2 |
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| * | Update TODOs | Matthias P. Braendli | 2023-01-23 | 1 | -8/+0 |
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| * | Add PA_70 | Matthias P. Braendli | 2023-01-22 | 1 | -2/+6 |
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| * | Add 70MHz frontend | Matthias P. Braendli | 2023-01-21 | 1 | -2/+6 |
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| * | More schematic work on DART-70 | Matthias P. Braendli | 2023-01-15 | 1 | -6/+2 |
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| * | Add hybrid cascode | Matthias P. Braendli | 2023-01-11 | 1 | -1/+1 |
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| * | Add initial files for DART-70 | Matthias P. Braendli | 2023-01-08 | 1 | -0/+346 |
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| 2m SSB transceiver |
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