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* Run ERC and DRC, fix silkscreenMatthias P. Braendli2023-03-091-1/+1
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* Make board a bit smallerMatthias P. Braendli2023-03-081-3/+3
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* Rework board outline and interior milling pathsMatthias P. Braendli2023-03-081-4/+4
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* Reannotate, add usbaudio schematicMatthias P. Braendli2023-03-061-3/+3
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* Add USB Audio codecMatthias P. Braendli2023-03-061-2/+2
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* Replace power connectorMatthias P. Braendli2023-03-061-2/+2
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* Add antenna voltage, separate EN_TX and EN_PAMatthias P. Braendli2023-03-061-2/+2
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* Do via stitchingMatthias P. Braendli2023-02-251-2/+2
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* Adapt README and schematic notesMatthias P. Braendli2023-02-251-3/+3
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* Replace PIN diodeMatthias P. Braendli2023-02-241-3/+3
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* ERC and DRCMatthias P. Braendli2023-02-191-2/+2
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* Improve MICSPKMatthias P. Braendli2023-02-191-3/+3
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* Rework placement and front connector board size, add digi input with VOX PTTMatthias P. Braendli2023-02-191-5/+7
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* Add DART-70 logoMatthias P. Braendli2023-02-161-1/+1
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* More routing, start moving silkscreenMatthias P. Braendli2023-02-121-3/+3
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* Move PA LPF to PA board and other changesMatthias P. Braendli2023-02-081-9/+2
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* Place and route PAMatthias P. Braendli2023-02-071-0/+1
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* Continue placement and refine schematicMatthias P. Braendli2023-02-071-2/+0
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* Place parts of frontendMatthias P. Braendli2023-02-051-1/+1
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* More placementMatthias P. Braendli2023-02-051-3/+9
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* Continue placementMatthias P. Braendli2023-02-031-4/+6
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* Define all footprintsMatthias P. Braendli2023-02-021-1/+1
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* Calculate diplexer valuesMatthias P. Braendli2023-01-291-1/+1
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* Add initial files for DART-70Matthias P. Braendli2023-01-081-0/+75