aboutsummaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* Update deps, set default freq to 70.200Matthias P. Braendli2024-01-234-109/+35
|
* Prepare DART-70 PA ordermanufacture_dart70_pa_20240123Matthias P. Braendli2024-01-238-2941/+1925
|
* Simplify DART-70 PAMatthias P. Braendli2024-01-204-2924/+2795
|
* DART-70 PA first place and routeMatthias P. Braendli2024-01-209-558/+14501
|
* Add kicad-dart-70-paMatthias P. Braendli2024-01-1415-32/+96756
|
* Replace Q10 with PNP and decrease R69 to 27OhmMatthias P. Braendli2023-09-199-7511/+13201
|
* Minor dart-70 updatesMatthias P. Braendli2023-09-192-66870/+90624
|
* DART-70 TX FE adaptationsMatthias P. Braendli2023-06-2910-68/+152
|
* Modify TXFE and prepare file for orderMatthias P. Braendli2023-05-2111-11470/+114272
|
* Assemble TX FE and update commentsMatthias P. Braendli2023-04-1311-21/+41
|
* Update rx fe schematic as assembledMatthias P. Braendli2023-04-077-42/+45
|
* Fix BF988 footprintMatthias P. Braendli2023-04-049-1194/+1095
|
* Continue DART assembly nad fix some issuesMatthias P. Braendli2023-04-0311-94254/+4521
|
* Fix MABA footprintMatthias P. Braendli2023-03-286-355/+2913
|
* Update sw xtal freqMatthias P. Braendli2023-03-281-3/+4
|
* Fix DART-70 things seen during assemblyMatthias P. Braendli2023-03-2511-559/+401
|
* Fix WSPR transmitter, support centihz freqMatthias P. Braendli2023-03-194-19/+71
|
* Add WSPR TX to eval-clock-cw-txMatthias P. Braendli2023-03-138-241/+220
|
* Update to kicad 7.0.1Matthias P. Braendli2023-03-1310-154254/+117655
|
* Update READMEsmanufacture_dart70_20230310Matthias P. Braendli2023-03-103-168/+178
|
* Run ERC and DRC, fix silkscreenMatthias P. Braendli2023-03-099-2394/+2367
|
* Add header for optional DCDCMatthias P. Braendli2023-03-094-7668/+7683
|
* Make board a bit smallerMatthias P. Braendli2023-03-084-22779/+110456
|
* Rework board outline and interior milling pathsMatthias P. Braendli2023-03-089-140715/+146507
|
* Reannotate, add usbaudio schematicMatthias P. Braendli2023-03-069-9017/+10603
|
* Add USB Audio codecMatthias P. Braendli2023-03-068-90279/+137961
|
* Replace power connectorMatthias P. Braendli2023-03-068-132158/+400
|
* Add antenna voltage, separate EN_TX and EN_PAMatthias P. Braendli2023-03-0611-8572/+99557
|
* Update eval-clock-cw-tx prerequisitesMatthias P. Braendli2023-03-037-175/+221
|
* Update schematic order and todoMatthias P. Braendli2023-03-027-162/+312
|
* Do via stitchingMatthias P. Braendli2023-02-255-91921/+6286
|
* Adapt README and schematic notesMatthias P. Braendli2023-02-2510-6774/+8758
|
* Create dart-70 firmwareMatthias P. Braendli2023-02-2520-0/+104191
|
* Replace PIN diodeMatthias P. Braendli2023-02-247-8106/+96247
|
* ERC and DRCMatthias P. Braendli2023-02-196-6924/+7380
|
* Improve MICSPKMatthias P. Braendli2023-02-193-1268/+1230
|
* Remove the mounting holes for vertical boards, solder headers insteadMatthias P. Braendli2023-02-195-7028/+863
|
* Rework placement and front connector board size, add digi input with VOX PTTMatthias P. Braendli2023-02-1910-118057/+31113
|
* Add DART-70 logoMatthias P. Braendli2023-02-165-126/+88593
|
* More routing, start moving silkscreenMatthias P. Braendli2023-02-129-5968/+138283
|
* Move PA LPF to PA board and other changesMatthias P. Braendli2023-02-0811-1998/+3518
|
* Place and route PAMatthias P. Braendli2023-02-078-87161/+6226
|
* Continue placement and refine schematicMatthias P. Braendli2023-02-077-5561/+86913
|
* Place frontendsMatthias P. Braendli2023-02-053-88181/+25
|
* Separate TX and RX frontendsMatthias P. Braendli2023-02-053-2766/+3336
|
* Place parts of frontendMatthias P. Braendli2023-02-055-1989/+2537
|
* More placementMatthias P. Braendli2023-02-054-1135/+86926
|
* Continue placementMatthias P. Braendli2023-02-036-4196/+5881
|
* Define all footprintsMatthias P. Braendli2023-02-029-950/+28667
|
* AnnotateMatthias P. Braendli2023-02-026-1209/+1589
|