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* Fix DART-70 things seen during assemblyMatthias P. Braendli2023-03-2511-559/+401
* Fix WSPR transmitter, support centihz freqMatthias P. Braendli2023-03-194-19/+71
* Add WSPR TX to eval-clock-cw-txMatthias P. Braendli2023-03-138-241/+220
* Update to kicad 7.0.1Matthias P. Braendli2023-03-1310-154254/+117655
* Update READMEsmanufacture_dart70_20230310Matthias P. Braendli2023-03-103-168/+178
* Run ERC and DRC, fix silkscreenMatthias P. Braendli2023-03-099-2394/+2367
* Add header for optional DCDCMatthias P. Braendli2023-03-094-7668/+7683
* Make board a bit smallerMatthias P. Braendli2023-03-084-22779/+110456
* Rework board outline and interior milling pathsMatthias P. Braendli2023-03-089-140715/+146507
* Reannotate, add usbaudio schematicMatthias P. Braendli2023-03-069-9017/+10603
* Add USB Audio codecMatthias P. Braendli2023-03-068-90279/+137961
* Replace power connectorMatthias P. Braendli2023-03-068-132158/+400
* Add antenna voltage, separate EN_TX and EN_PAMatthias P. Braendli2023-03-0611-8572/+99557
* Update eval-clock-cw-tx prerequisitesMatthias P. Braendli2023-03-037-175/+221
* Update schematic order and todoMatthias P. Braendli2023-03-027-162/+312
* Do via stitchingMatthias P. Braendli2023-02-255-91921/+6286
* Adapt README and schematic notesMatthias P. Braendli2023-02-2510-6774/+8758
* Create dart-70 firmwareMatthias P. Braendli2023-02-2520-0/+104191
* Replace PIN diodeMatthias P. Braendli2023-02-247-8106/+96247
* ERC and DRCMatthias P. Braendli2023-02-196-6924/+7380
* Improve MICSPKMatthias P. Braendli2023-02-193-1268/+1230
* Remove the mounting holes for vertical boards, solder headers insteadMatthias P. Braendli2023-02-195-7028/+863
* Rework placement and front connector board size, add digi input with VOX PTTMatthias P. Braendli2023-02-1910-118057/+31113
* Add DART-70 logoMatthias P. Braendli2023-02-165-126/+88593
* More routing, start moving silkscreenMatthias P. Braendli2023-02-129-5968/+138283
* Move PA LPF to PA board and other changesMatthias P. Braendli2023-02-0811-1998/+3518
* Place and route PAMatthias P. Braendli2023-02-078-87161/+6226
* Continue placement and refine schematicMatthias P. Braendli2023-02-077-5561/+86913
* Place frontendsMatthias P. Braendli2023-02-053-88181/+25
* Separate TX and RX frontendsMatthias P. Braendli2023-02-053-2766/+3336
* Place parts of frontendMatthias P. Braendli2023-02-055-1989/+2537
* More placementMatthias P. Braendli2023-02-054-1135/+86926
* Continue placementMatthias P. Braendli2023-02-036-4196/+5881
* Define all footprintsMatthias P. Braendli2023-02-029-950/+28667
* AnnotateMatthias P. Braendli2023-02-026-1209/+1589
* Run ERCMatthias P. Braendli2023-02-025-4134/+1529
* Review componentsMatthias P. Braendli2023-02-016-90939/+5326
* Update schematicMatthias P. Braendli2023-01-315-2134/+856
* Replace all GNDA by GNDMatthias P. Braendli2023-01-295-547/+3307
* Calculate diplexer valuesMatthias P. Braendli2023-01-295-969/+1733
* Add rx gain stageMatthias P. Braendli2023-01-246-861/+1642
* Add PA lowpass filter valuesMatthias P. Braendli2023-01-243-202/+209
* Add blockdiagramMatthias P. Braendli2023-01-241-0/+1444
* Add RX filterMatthias P. Braendli2023-01-242-972/+1494
* Add connectors for FE, PA and ControlMatthias P. Braendli2023-01-236-3298/+4739
* Update TODOsMatthias P. Braendli2023-01-235-935/+196
* Add PA_70Matthias P. Braendli2023-01-225-3066/+7832
* Change 70MHz filterMatthias P. Braendli2023-01-226-2192/+2192
* Add 70MHz frontendMatthias P. Braendli2023-01-214-18/+91855
* Schematic workMatthias P. Braendli2023-01-213-738/+1505
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