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authorMatthias P. Braendli <matthias.braendli@mpb.li>2020-06-28 16:42:21 +0200
committerMatthias P. Braendli <matthias.braendli@mpb.li>2020-06-28 16:42:21 +0200
commit5d1cff57f9f5acd740a8b5f8c941beefdcc00176 (patch)
treebdfd0e394d6333aead7d3a0295ba3457bd68275d /sw/demo1/.gdbinit
parent93220f99a52dc93f9a2d5b11074f60156ef70210 (diff)
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sw: configure si5351
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+target remote :3333
+
+monitor arm semihosting enable
+
+# # send captured ITM to the file itm.fifo
+# # (the microcontroller SWO pin must be connected to the programmer SWO pin)
+# # 8000000 must match the core clock frequency
+# monitor tpiu config internal itm.fifo uart off 8000000
+
+# # OR: make the microcontroller SWO pin output compatible with UART (8N1)
+# # 2000000 is the frequency of the SWO pin
+# monitor tpiu config external uart off 8000000 2000000
+
+# # enable ITM port 0
+# monitor itm port 0 on
+
+#load
+#step