summaryrefslogtreecommitdiffstats
path: root/libFDK/include/arm
diff options
context:
space:
mode:
authorDave Burke <daveburke@google.com>2012-04-17 09:51:45 -0700
committerDave Burke <daveburke@google.com>2012-04-17 23:04:43 -0700
commit9bf37cc9712506b2483650c82d3c41152337ef7e (patch)
tree77db44e2bae06e3d144b255628be2b7a55c581d3 /libFDK/include/arm
parenta37315fe10ee143d6d0b28c19d41a476a23e63ea (diff)
downloadfdk-aac-9bf37cc9712506b2483650c82d3c41152337ef7e.tar.gz
fdk-aac-9bf37cc9712506b2483650c82d3c41152337ef7e.tar.bz2
fdk-aac-9bf37cc9712506b2483650c82d3c41152337ef7e.zip
Fraunhofer AAC codec.
License boilerplate update to follow. Change-Id: I2810460c11a58b6d148d84673cc031f3685e79b5
Diffstat (limited to 'libFDK/include/arm')
-rw-r--r--libFDK/include/arm/clz_arm.h59
-rw-r--r--libFDK/include/arm/cplx_mul.h153
-rw-r--r--libFDK/include/arm/fixmadd_arm.h97
-rw-r--r--libFDK/include/arm/fixmul_arm.h79
-rw-r--r--libFDK/include/arm/scale.h90
-rw-r--r--libFDK/include/arm/scramble.h98
6 files changed, 576 insertions, 0 deletions
diff --git a/libFDK/include/arm/clz_arm.h b/libFDK/include/arm/clz_arm.h
new file mode 100644
index 0000000..d3c3e04
--- /dev/null
+++ b/libFDK/include/arm/clz_arm.h
@@ -0,0 +1,59 @@
+/*************************** Fraunhofer IIS FDK Tools **********************
+
+ (C) Copyright Fraunhofer IIS (2006)
+ All Rights Reserved
+
+ Please be advised that this software and/or program delivery is
+ Confidential Information of Fraunhofer and subject to and covered by the
+
+ Fraunhofer IIS Software Evaluation Agreement
+ between Google Inc. and Fraunhofer
+ effective and in full force since March 1, 2012.
+
+ You may use this software and/or program only under the terms and
+ conditions described in the above mentioned Fraunhofer IIS Software
+ Evaluation Agreement. Any other and/or further use requires a separate agreement.
+
+
+ $Id$
+ Author(s):
+ Description: fixed point intrinsics
+
+ This software and/or program is protected by copyright law and international
+ treaties. Any reproduction or distribution of this software and/or program,
+ or any portion of it, may result in severe civil and criminal penalties, and
+ will be prosecuted to the maximum extent possible under law.
+
+******************************************************************************/
+#if defined(__arm__)
+
+#if defined(__GNUC__) && defined(__ARM_ARCH_5TE__) /* cppp replaced: elif */
+ /* ARM gcc*/
+
+ #define FUNCTION_fixnormz_D
+ #define FUNCTION_fixnorm_D
+
+ inline INT fixnormz_D(LONG value)
+ {
+ INT result;
+ asm("clz %0, %1 ": "=r"(result) : "r"(value) );
+ return result;
+ }
+
+ inline INT fixnorm_D(LONG value)
+ {
+ INT result;
+ if (value < 0) {
+ value = ~value;
+ }
+ if (value == 0) {
+ return 0;
+ }
+ result = fixnormz_D(value);
+ return result - 1;
+ }
+
+#endif /* arm toolchain */
+
+#endif /* __arm__ */
+
diff --git a/libFDK/include/arm/cplx_mul.h b/libFDK/include/arm/cplx_mul.h
new file mode 100644
index 0000000..dba2a9f
--- /dev/null
+++ b/libFDK/include/arm/cplx_mul.h
@@ -0,0 +1,153 @@
+/*************************** Fraunhofer IIS FDK Tools **********************
+
+ (C) Copyright Fraunhofer IIS (2006)
+ All Rights Reserved
+
+ Please be advised that this software and/or program delivery is
+ Confidential Information of Fraunhofer and subject to and covered by the
+
+ Fraunhofer IIS Software Evaluation Agreement
+ between Google Inc. and Fraunhofer
+ effective and in full force since March 1, 2012.
+
+ You may use this software and/or program only under the terms and
+ conditions described in the above mentioned Fraunhofer IIS Software
+ Evaluation Agreement. Any other and/or further use requires a separate agreement.
+
+
+ $Id$
+ Author(s):
+ Description: fixed point intrinsics
+
+ This software and/or program is protected by copyright law and international
+ treaties. Any reproduction or distribution of this software and/or program,
+ or any portion of it, may result in severe civil and criminal penalties, and
+ will be prosecuted to the maximum extent possible under law.
+
+******************************************************************************/
+
+
+#if defined(__arm__) && defined(__GNUC__) /* cppp replaced: elif */
+
+#if defined(__ARM_ARCH_5TE__) || defined(__ARM_ARCH_6__)
+ #define FUNCTION_cplxMultDiv2_32x16
+ #define FUNCTION_cplxMultDiv2_32x16X2
+ //#define FUNCTION_cplxMult_32x16
+ //#define FUNCTION_cplxMult_32x16X2
+#endif
+
+#define FUNCTION_cplxMultDiv2_32x32X2
+//#define FUNCTION_cplxMult_32x32X2
+
+#ifdef FUNCTION_cplxMultDiv2_32x16
+inline void cplxMultDiv2( FIXP_DBL *c_Re,
+ FIXP_DBL *c_Im,
+ const FIXP_DBL a_Re,
+ const FIXP_DBL a_Im,
+ const FIXP_SPK wpk )
+{
+ LONG tmp1,tmp2;
+ const LONG w = wpk.w;
+
+ asm("smulwt %0, %3, %4;\n"
+ "rsb %1,%0,#0;\n"
+ "smlawb %0, %2, %4, %1;\n"
+ "smulwt %1, %2, %4;\n"
+ "smlawb %1, %3, %4, %1;\n"
+ : "=&r"(tmp1), "=&r"(tmp2)
+ : "r"(a_Re), "r"(a_Im), "r"(w)
+ );
+
+ *c_Re = tmp1;
+ *c_Im = tmp2;
+}
+#endif /* FUNCTION_cplxMultDiv2_32x16 */
+
+#ifdef FUNCTION_cplxMultDiv2_32x16X2
+inline void cplxMultDiv2( FIXP_DBL *c_Re,
+ FIXP_DBL *c_Im,
+ const FIXP_DBL a_Re,
+ const FIXP_DBL a_Im,
+ const FIXP_SGL b_Re,
+ const FIXP_SGL b_Im)
+{
+ LONG tmp1, tmp2;
+
+ asm("smulwb %0, %3, %5;\n" /* %7 = -a_Im * b_Im */
+ "rsb %1,%0,#0;\n"
+ "smlawb %0, %2, %4, %1;\n" /* tmp1 = a_Re * b_Re - a_Im * b_Im */
+ "smulwb %1, %2, %5;\n" /* %7 = a_Re * b_Im */
+ "smlawb %1, %3, %4, %1;\n" /* tmp2 = a_Im * b_Re + a_Re * b_Im */
+ : "=&r"(tmp1), "=&r"(tmp2)
+ : "r"(a_Re), "r"(a_Im), "r"(b_Re), "r"(b_Im)
+ );
+
+ *c_Re = tmp1;
+ *c_Im = tmp2;
+}
+#endif /* FUNCTION_cplxMultDiv2_32x16X2 */
+
+#ifdef FUNCTION_cplxMultAddDiv2_32x16X2
+inline void cplxMultAddDiv2( FIXP_DBL *c_Re,
+ FIXP_DBL *c_Im,
+ const FIXP_DBL a_Re,
+ const FIXP_DBL a_Im,
+ const FIXP_SGL b_Re,
+ const FIXP_SGL b_Im)
+{
+ LONG tmp1, tmp2;
+
+ asm("smulwb %0, %3, %5;\n"
+ "rsb %1,%0,#0;\n"
+ "smlawb %0, %2, %4, %1;\n"
+ "smulwb %1, %2, %5;\n"
+ "smlawb %1, %3, %4, %1;\n"
+ : "=&r"(tmp1), "=&r"(tmp2)
+ : "r"(a_Re), "r"(a_Im), "r"(b_Re), "r"(b_Im)
+ );
+
+ *c_Re += tmp1;
+ *c_Im += tmp2;
+}
+#endif /* FUNCTION_cplxMultAddDiv2_32x16X2 */
+
+
+#ifdef FUNCTION_cplxMultDiv2_32x32X2
+inline void cplxMultDiv2( FIXP_DBL *c_Re,
+ FIXP_DBL *c_Im,
+ const FIXP_DBL a_Re,
+ const FIXP_DBL a_Im,
+ const FIXP_DBL b_Re,
+ const FIXP_DBL b_Im)
+{
+ LONG tmp1, tmp2;
+
+#ifdef __ARM_ARCH_6__
+ asm(
+ "smmul %0, %2, %4;\n" /* tmp1 = a_Re * b_Re */
+ "smmls %0, %3, %5, %0;\n" /* tmp1 -= a_Im * b_Im */
+ "smmul %1, %2, %5;\n" /* tmp2 = a_Re * b_Im */
+ "smmla %1, %3, %4, %1;\n" /* tmp2 += a_Im * b_Re */
+ : "=&r"(tmp1), "=&r"(tmp2)
+ : "r"(a_Re), "r"(a_Im), "r"(b_Re), "r"(b_Im)
+ : "r0"
+ );
+#else
+ LONG discard;
+ asm(
+ "smull %2, %0, %7, %6;\n" /* tmp1 = -a_Im * b_Im */
+ "smlal %2, %0, %3, %5;\n" /* tmp1 += a_Re * b_Re */
+ "smull %2, %1, %3, %6;\n" /* tmp2 = a_Re * b_Im */
+ "smlal %2, %1, %4, %5;\n" /* tmp2 += a_Im * b_Re */
+ : "=&r"(tmp1), "=&r"(tmp2), "=&r"(discard)
+ : "r"(a_Re), "r"(a_Im), "r"(b_Re), "r"(b_Im), "r"(-a_Im)
+ );
+ #endif
+ *c_Re = tmp1;
+ *c_Im = tmp2;
+}
+#endif /* FUNCTION_cplxMultDiv2_32x32X2 */
+
+
+#endif
+
diff --git a/libFDK/include/arm/fixmadd_arm.h b/libFDK/include/arm/fixmadd_arm.h
new file mode 100644
index 0000000..15308f7
--- /dev/null
+++ b/libFDK/include/arm/fixmadd_arm.h
@@ -0,0 +1,97 @@
+/*************************** Fraunhofer IIS FDK Tools **********************
+
+ (C) Copyright Fraunhofer IIS (2006)
+ All Rights Reserved
+
+ Please be advised that this software and/or program delivery is
+ Confidential Information of Fraunhofer and subject to and covered by the
+
+ Fraunhofer IIS Software Evaluation Agreement
+ between Google Inc. and Fraunhofer
+ effective and in full force since March 1, 2012.
+
+ You may use this software and/or program only under the terms and
+ conditions described in the above mentioned Fraunhofer IIS Software
+ Evaluation Agreement. Any other and/or further use requires a separate agreement.
+
+
+ $Id$
+ Author(s):
+ Description: fixed point intrinsics
+
+ This software and/or program is protected by copyright law and international
+ treaties. Any reproduction or distribution of this software and/or program,
+ or any portion of it, may result in severe civil and criminal penalties, and
+ will be prosecuted to the maximum extent possible under law.
+
+******************************************************************************/
+#if defined(__arm__)
+
+ /* ############################################################################# */
+ #if defined(__GNUC__) && defined(__arm__) && !defined(__SYMBIAN32__) /* cppp replaced: elif */
+ /* ############################################################################# */
+ /* ARM GNU GCC */
+
+ #define FUNCTION_fixmadddiv2_DD
+
+ #ifdef __ARM_ARCH_6__
+ inline FIXP_DBL fixmadddiv2_DD (FIXP_DBL x, const FIXP_DBL a, const FIXP_DBL b) {
+ INT result;
+ asm ("smmla %0, %1, %2, %3;\n"
+ : "=r" (result)
+ : "r" (a), "r" (b), "r"(x) );
+ return result ;
+ }
+ #define FUNCTION_fixmsubdiv2_DD
+ inline FIXP_DBL fixmsubdiv2_DD (FIXP_DBL x, const FIXP_DBL a, const FIXP_DBL b) {
+ INT result;
+ asm ("smmls %0, %1, %2, %3;\n"
+ : "=r" (result)
+ : "r" (a), "r" (b), "r"(x) );
+ return result ;
+ }
+ #else /* __ARM_ARCH_6__ */
+ inline FIXP_DBL fixmadddiv2_DD (FIXP_DBL x, const FIXP_DBL a, const FIXP_DBL b) {
+ INT discard, result = x;
+ asm ("smlal %0, %1, %2, %3;\n"
+ : "=r" (discard), "+r" (result)
+ : "r" (a), "r" (b) );
+ return result ;
+ }
+ #endif /* __ARM_ARCH_6__ */
+
+ #if defined(__ARM_ARCH_5TE__) || defined(__ARM_ARCH_6__)
+
+ #define FUNCTION_fixmadddiv2_DS
+
+ inline FIXP_DBL fixmadddiv2_DS (FIXP_DBL x, const FIXP_DBL a, const FIXP_SGL b) {
+ INT result;
+ asm("smlawb %0, %1, %2, %3 "
+ : "=r" (result)
+ : "r" (a), "r" (b), "r" (x) );
+ return result ;
+ }
+
+ #endif /* defined(__ARM_ARCH_5TE__) || defined(__ARM_ARCH_6__) */
+
+ #define FUNCTION_fixmadddiv2BitExact_DD
+ #define fixmadddiv2BitExact_DD(a, b, c) fixmadddiv2_DD(a, b, c)
+
+ #define FUNCTION_fixmsubdiv2BitExact_DD
+ inline FIXP_DBL fixmsubdiv2BitExact_DD (FIXP_DBL x, const FIXP_DBL a, const FIXP_DBL b) {
+ return x - fixmuldiv2BitExact_DD(a, b);
+ }
+
+ #define FUNCTION_fixmadddiv2BitExact_DS
+ #define fixmadddiv2BitExact_DS(a, b, c) fixmadddiv2_DS(a, b, c)
+
+ #define FUNCTION_fixmsubdiv2BitExact_DS
+ inline FIXP_DBL fixmsubdiv2BitExact_DS (FIXP_DBL x, const FIXP_DBL a, const FIXP_SGL b) {
+ return x - fixmuldiv2BitExact_DS(a, b);
+ }
+ /* ############################################################################# */
+ #endif /* toolchain */
+ /* ############################################################################# */
+
+#endif /* __arm__ */
+
diff --git a/libFDK/include/arm/fixmul_arm.h b/libFDK/include/arm/fixmul_arm.h
new file mode 100644
index 0000000..8cc448d
--- /dev/null
+++ b/libFDK/include/arm/fixmul_arm.h
@@ -0,0 +1,79 @@
+/*************************** Fraunhofer IIS FDK Tools **********************
+
+ (C) Copyright Fraunhofer IIS (2006)
+ All Rights Reserved
+
+ Please be advised that this software and/or program delivery is
+ Confidential Information of Fraunhofer and subject to and covered by the
+
+ Fraunhofer IIS Software Evaluation Agreement
+ between Google Inc. and Fraunhofer
+ effective and in full force since March 1, 2012.
+
+ You may use this software and/or program only under the terms and
+ conditions described in the above mentioned Fraunhofer IIS Software
+ Evaluation Agreement. Any other and/or further use requires a separate agreement.
+
+
+ $Id$
+ Author(s):
+ Description: fixed point intrinsics
+
+ This software and/or program is protected by copyright law and international
+ treaties. Any reproduction or distribution of this software and/or program,
+ or any portion of it, may result in severe civil and criminal penalties, and
+ will be prosecuted to the maximum extent possible under law.
+
+******************************************************************************/
+#if defined(__arm__)
+
+#if defined(__GNUC__) && defined(__arm__) /* cppp replaced: elif */
+/* ARM with GNU compiler */
+
+#define FUNCTION_fixmuldiv2_DD
+
+#define FUNCTION_fixmuldiv2BitExact_DD
+#define fixmuldiv2BitExact_DD(a,b) fixmuldiv2_DD(a,b)
+#define FUNCTION_fixmulBitExact_DD
+#define fixmulBitExact_DD(a,b) fixmul_DD(a,b)
+
+#define FUNCTION_fixmuldiv2BitExact_DS
+#define fixmuldiv2BitExact_DS(a,b) fixmuldiv2_DS(a,b)
+
+#define FUNCTION_fixmulBitExact_DS
+#define fixmulBitExact_DS(a,b) fixmul_DS(a,b)
+
+#if defined(__ARM_ARCH_6__) || defined(__TARGET_ARCH_7E_M)
+inline INT fixmuldiv2_DD (const INT a, const INT b)
+{
+ INT result ;
+ __asm__ ("smmul %0, %1, %2" : "=r" (result)
+ : "r" (a), "r" (b)) ;
+ return result ;
+}
+#else
+inline INT fixmuldiv2_DD (const INT a, const INT b)
+{
+ INT discard, result ;
+ __asm__ ("smull %0, %1, %2, %3" : "=&r" (discard), "=r" (result)
+ : "r" (a), "r" (b)) ;
+ return result ;
+}
+#endif
+
+#if defined(__ARM_ARCH_5TE__) || defined(__ARM_ARCH_6__)
+#define FUNCTION_fixmuldiv2_SD
+inline INT fixmuldiv2_SD (const SHORT a, const INT b)
+{
+ INT result ;
+ __asm__ ("smulwb %0, %1, %2"
+ : "=r" (result)
+ : "r" (b), "r" (a)) ;
+ return result ;
+}
+#endif
+
+#endif /* defined(__GNUC__) && defined(__arm__) */
+
+#endif /* __arm__ */
+
diff --git a/libFDK/include/arm/scale.h b/libFDK/include/arm/scale.h
new file mode 100644
index 0000000..11d18fb
--- /dev/null
+++ b/libFDK/include/arm/scale.h
@@ -0,0 +1,90 @@
+/******************************** Fraunhofer IIS ***************************
+
+ (C) Copyright Fraunhofer IIS (2006)
+ All Rights Reserved
+
+ Please be advised that this software and/or program delivery is
+ Confidential Information of Fraunhofer and subject to and covered by the
+
+ Fraunhofer IIS Software Evaluation Agreement
+ between Google Inc. and Fraunhofer
+ effective and in full force since March 1, 2012.
+
+ You may use this software and/or program only under the terms and
+ conditions described in the above mentioned Fraunhofer IIS Software
+ Evaluation Agreement. Any other and/or further use requires a separate agreement.
+
+
+ $Id:
+ Author(s):
+ Description: ARM scaling operations
+
+ This software and/or program is protected by copyright law and international
+ treaties. Any reproduction or distribution of this software and/or program,
+ or any portion of it, may result in severe civil and criminal penalties, and
+ will be prosecuted to the maximum extent possible under law.
+
+******************************************************************************/
+
+#if defined(__GNUC__) /* GCC Compiler */ /* cppp replaced: elif */
+
+#if defined(__ARM_ARCH_6__)
+
+inline static INT shiftRightSat(INT src, int scale)
+{
+ INT result;
+ asm(
+ "ssat %0,%2,%0;\n"
+
+ : "=&r"(result)
+ : "r"(src>>scale), "M"(SAMPLE_BITS)
+ );
+
+ return result;
+}
+
+ #define SATURATE_INT_PCM_RIGHT_SHIFT(src, scale) shiftRightSat(src, scale)
+
+inline static INT shiftLeftSat(INT src, int scale)
+{
+ INT result;
+ asm(
+ "ssat %0,%2,%0;\n"
+
+ : "=&r"(result)
+ : "r"(src<<scale), "M"(SAMPLE_BITS)
+ );
+
+ return result;
+}
+
+ #define SATURATE_INT_PCM_LEFT_SHIFT(src, scale) shiftLeftSat(src, scale)
+
+#endif /* __ARM_ARCH_6__ */
+
+#endif /* compiler selection */
+
+#define FUNCTION_scaleValueInPlace
+inline
+void scaleValueInPlace(FIXP_DBL *value, /*!< Value */
+ INT scalefactor /*!< Scalefactor */
+ )
+{
+ INT newscale;
+ if ((newscale = scalefactor) >= 0)
+ *value <<= newscale;
+ else
+ *value >>= -newscale;
+}
+
+
+ #define SATURATE_RIGHT_SHIFT(src, scale, dBits) \
+ ( (((LONG)(src) ^ ((LONG)(src) >> (DFRACT_BITS-1)))>>(scale)) > (LONG)(((1U)<<((dBits)-1))-1)) \
+ ? ((LONG)(src) >> (DFRACT_BITS-1)) ^ (LONG)(((1U)<<((dBits)-1))-1) \
+ : ((LONG)(src) >> (scale))
+
+ #define SATURATE_LEFT_SHIFT(src, scale, dBits) \
+ ( ((LONG)(src) ^ ((LONG)(src) >> (DFRACT_BITS-1))) > ((LONG)(((1U)<<((dBits)-1))-1) >> (scale)) ) \
+ ? ((LONG)(src) >> (DFRACT_BITS-1)) ^ (LONG)(((1U)<<((dBits)-1))-1) \
+ : ((LONG)(src) << (scale))
+
diff --git a/libFDK/include/arm/scramble.h b/libFDK/include/arm/scramble.h
new file mode 100644
index 0000000..9143155
--- /dev/null
+++ b/libFDK/include/arm/scramble.h
@@ -0,0 +1,98 @@
+/*************************** Fraunhofer IIS FDK Tools **********************
+
+ (C) Copyright Fraunhofer IIS (2005)
+ All Rights Reserved
+
+ Please be advised that this software and/or program delivery is
+ Confidential Information of Fraunhofer and subject to and covered by the
+
+ Fraunhofer IIS Software Evaluation Agreement
+ between Google Inc. and Fraunhofer
+ effective and in full force since March 1, 2012.
+
+ You may use this software and/or program only under the terms and
+ conditions described in the above mentioned Fraunhofer IIS Software
+ Evaluation Agreement. Any other and/or further use requires a separate agreement.
+
+
+ $Id$
+ Author(s):
+ Description: bitreversal of input data
+
+ This software and/or program is protected by copyright law and international
+ treaties. Any reproduction or distribution of this software and/or program,
+ or any portion of it, may result in severe civil and criminal penalties, and
+ will be prosecuted to the maximum extent possible under law.
+
+******************************************************************************/
+
+
+
+#if defined(FUNCTION_scramble)
+#if defined(__GNUC__) /* cppp replaced: elif */
+
+#define FUNCTION_scramble
+
+#if defined(__ARM_ARCH_5TE__)
+#define USE_LDRD_STRD /* LDRD requires 8 byte data alignment. */
+#endif
+
+inline void scramble(FIXP_DBL x [], INT n) {
+ FDK_ASSERT(!(((INT)x)&(ALIGNMENT_DEFAULT-1)));
+ asm("mov r2, #1;\n" /* r2(m) = 1; */
+ "sub r3, %1, #1;\n" /* r3 = n-1; */
+ "mov r4, #0;\n" /* r4(j) = 0; */
+
+"scramble_m_loop%=:\n" /* { */
+ "mov r5, %1;\n" /* r5(k) = 1; */
+
+"scramble_k_loop%=:\n" /* { */
+ "mov r5, r5, lsr #1;\n" /* k >>= 1; */
+ "eor r4, r4, r5;\n" /* j ^=k; */
+ "ands r10, r4, r5;\n" /* r10 = r4 & r5; */
+ "beq scramble_k_loop%=;\n" /* } while (r10 == 0); */
+
+ "cmp r4, r2;\n" /* if (r4 < r2) break; */
+ "bcc scramble_m_loop_end%=;\n"
+
+#ifdef USE_LDRD_STRD
+ "mov r5, r2, lsl #3;\n" /* m(r5) = r2*4*2 */
+ "ldrd r10, [%0, r5];\n" /* r10 = x[r5], x7 = x[r5+1] */
+ "mov r6, r4, lsl #3;\n" /* j(r6) = r4*4*2 */
+ "ldrd r8, [%0, r6];\n" /* r8 = x[r6], r9 = x[r6+1]; */
+ "strd r10, [%0, r6];\n" /* x[r6,r6+1] = r10,r11; */
+ "strd r8, [%0, r5];\n" /* x[r5,r5+1] = r8,r9; */
+#else
+ "mov r5, r2, lsl #3;\n" /* m(r5) = r2*4*2 */
+ "ldr r10, [%0, r5];\n"
+ "mov r6, r4, lsl #3;\n" /* j(r6) = r4*4*2 */
+ "ldr r11, [%0, r6];\n"
+
+ "str r10, [%0, r6];\n"
+ "str r11, [%0, r5];\n"
+
+ "add r5, r5, #4;"
+ "ldr r10, [%0, r5];\n"
+ "add r6, r6, #4;"
+ "ldr r11, [%0, r6];\n"
+ "str r10, [%0, r6];\n"
+ "str r11, [%0, r5];\n"
+#endif
+"scramble_m_loop_end%=:\n"
+ "add r2, r2, #1;\n" /* r2++; */
+ "cmp r2, r3;\n"
+ "bcc scramble_m_loop%=;\n" /* } while (r2(m) < r3(n-1)); */
+ :
+ : "r"(x), "r"(n)
+#ifdef USE_LDRD_STRD
+ : "r2","r3", "r4","r5", "r10","r11", "r8","r9", "r6" );
+#else
+ : "r2","r3", "r4","r5", "r10","r11", "r6" );
+#endif
+}
+#else
+/* Force C implementation if no assembler version available. */
+#undef FUNCTION_scramble
+#endif /* Toolchain selection. */
+
+#endif /* defined(FUNCTION_scramble) */