From 1d69f31a0a48b1b62d311e7283f5dc1f59e032c3 Mon Sep 17 00:00:00 2001
From: "Matthias P. Braendli" <matthias.braendli@mpb.li>
Date: Tue, 10 Apr 2018 22:50:43 +0200
Subject: Skip easydabv3 FPGA blocks in modulator

---
 src/DabModulator.cpp | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

(limited to 'src')

diff --git a/src/DabModulator.cpp b/src/DabModulator.cpp
index 64c78af..acc3d0c 100644
--- a/src/DabModulator.cpp
+++ b/src/DabModulator.cpp
@@ -132,6 +132,7 @@ int DabModulator::process(Buffer* dataOut)
         auto cifMux = make_shared<FrameMultiplexer>(myEtiSource);
         auto cifPart = make_shared<BlockPartitioner>(mode);
 
+#if !defined(BUILD_FOR_EASYDABV3)
         auto cifMap = make_shared<QpskSymbolMapper>(myNbCarriers);
         auto cifRef = make_shared<PhaseReference>(mode);
         auto cifFreq = make_shared<FrequencyInterleaver>(mode);
@@ -215,8 +216,6 @@ int DabModulator::process(Buffer* dataOut)
             rcs.enrol(cifPoly.get());
         }
 
-        myOutput = make_shared<OutputMemory>(dataOut);
-
         shared_ptr<Resampler> cifRes;
         if (m_settings.outputRate != 2048000) {
             cifRes = make_shared<Resampler>(
@@ -224,6 +223,9 @@ int DabModulator::process(Buffer* dataOut)
                     m_settings.outputRate,
                     mySpacing);
         }
+#endif
+
+        myOutput = make_shared<OutputMemory>(dataOut);
 
         myFlowgraph->connect(cifPrbs, cifMux);
 
@@ -330,6 +332,9 @@ int DabModulator::process(Buffer* dataOut)
         }
 
         myFlowgraph->connect(cifMux, cifPart);
+#if defined(BUILD_FOR_EASYDABV3)
+        myFlowgraph->connect(cifPart, myOutput);
+#else
         myFlowgraph->connect(cifPart, cifMap);
         myFlowgraph->connect(cifMap, cifFreq);
         myFlowgraph->connect(cifRef, cifDiff);
@@ -359,6 +364,7 @@ int DabModulator::process(Buffer* dataOut)
                 prev_plugin = p;
             }
         }
+#endif
     }
 
     ////////////////////////////////////////////////////////////////////
-- 
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