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authorMatthias P. Braendli (think) <matthias@mpb.li>2012-09-13 17:36:03 +0200
committerMatthias P. Braendli (think) <matthias@mpb.li>2012-09-13 17:36:03 +0200
commit95db3fa1e516aefa239f0dbe06bcda674e57b6a1 (patch)
tree6f48db5d285c63427c8aae2839ed12bad4928d1d /doc
parent22582ffe518abe940f5ebf426f349af6838c87af (diff)
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crc-dabmod: updated example.ini corresponding to new time and clock settings
Diffstat (limited to 'doc')
-rw-r--r--doc/example.ini14
1 files changed, 6 insertions, 8 deletions
diff --git a/doc/example.ini b/doc/example.ini
index 2386557..2e58958 100644
--- a/doc/example.ini
+++ b/doc/example.ini
@@ -18,7 +18,8 @@ loop=1
gainmode=2
; Transmission mode
-mode=2
+; If not defined, take the mode from ETI
+;mode=2
; Set to 0 to disable CicEqualiser
dac_clk_rate=0
@@ -44,14 +45,11 @@ device=master_clock_rate=32768000,type=b100
frequency=234208000
txgain=0
-; possible values : auto, int, sma, mimo
-refclk_source=int
+; possible values : internal, external, MIMO
+refclk_source=internal
-; possible values : int, sma, mimo
-pps_source=int
-
-; possible values : pos, neg
-pps_polarity=pos
+; possible values : none, external, MIMO
+pps_source=none
; behaviour when external clock reference lock lost
; possible values: ignore, crash