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authorMatthias P. Braendli <matthias.braendli@mpb.li>2019-02-27 11:37:53 +0100
committerMatthias P. Braendli <matthias.braendli@mpb.li>2019-02-27 11:37:53 +0100
commit705ae30e5f7cc2525627f338beef8c90a8678c2f (patch)
treed119190bf5eba0e70eea2fecc8fd005ec2fa9cb5 /doc/example.ini
parent6db4e5b3ad28973601b8e7426a4cffa01322b9a2 (diff)
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Refactor Lime output
* master_clock_rate sets CGEN clock, not sample rate * set sample rate accordingly * support only interpolate 1 and 2 * add frequency, txgain and temperature to RC * improve error handling * fix signedness of LMS_SendStream() return value
Diffstat (limited to 'doc/example.ini')
-rw-r--r--doc/example.ini19
1 files changed, 18 insertions, 1 deletions
diff --git a/doc/example.ini b/doc/example.ini
index b94825c..5dd2846 100644
--- a/doc/example.ini
+++ b/doc/example.ini
@@ -154,7 +154,7 @@ enabled=0
polycoeffile=polyCoefs
[output]
-; choose output: possible values: uhd, file, zmq, soapysdr
+; choose output: possible values: uhd, file, zmq, soapysdr, limesdr
output=uhd
[fileoutput]
@@ -306,6 +306,23 @@ channel=13C
; Set to 0 to disable
;dpd_port=50055
+[limeoutput]
+; Lime output directly runs against the LMS device driver. It does not support SFN nor predistortion.
+device=
+;master_clock_rate=
+
+; txgain range: 0 .. 100
+txgain=20
+tx_antenna=BAND1
+;lo_offset=2048000
+;frequency=234208000
+channel=13C
+
+; The LimeSDR contains a FIR filter in FPGA that can be used to filter the IQ signal.
+; This is useful because it allows us to upsample in a very cheap way in software instead
+; of using the FFT-based resampler.
+upsample=1
+
; Used for running single-frequency networks
[delaymanagement]
; Enable handling of timestamps for SFN