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authorMatthias P. Braendli <matthias.braendli@mpb.li>2014-03-07 20:59:45 +0100
committerMatthias P. Braendli <matthias.braendli@mpb.li>2014-03-07 20:59:45 +0100
commit2e719a17158b6262b6824f568ddf8f96a348836a (patch)
tree8da30b19ab4c3f1f925c2d1a38fc7d7fe2c8360e
parent1500cb3368e2522d98d13b51339e560159d3741b (diff)
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update example config with B200 information
-rw-r--r--doc/example.ini28
-rw-r--r--src/OutputUHD.cpp1
2 files changed, 28 insertions, 1 deletions
diff --git a/doc/example.ini b/doc/example.ini
index 31c28fa..7f4e315 100644
--- a/doc/example.ini
+++ b/doc/example.ini
@@ -53,11 +53,37 @@ output=uhd
filename=/dev/stdout
[uhdoutput]
+; For a USRP B100:
device=master_clock_rate=32768000,type=b100
+txgain=2
+; Try with small gain values
+
+; For the B200
+;device=master_clock_rate=20480000,type=b200
+;txgain=40
+; The B200 needs larger gains (up to 89dB) but,
+; "Gain settings are application specific, but it is recommended that users
+; consider using at least half of the available gain to get reasonable dynamic
+; range."
+; From the B200 User Manual
+; http://files.ettus.com/uhd_docs/manual/html/usrp_b200.html
+
+; TODO: measure the RF quality with different values of master_clock_rate:
+; 10240000
+; 20480000
+; 30720000
+; 32768000
+; and other values
+
+; For the USRP1
+;device=type=usrp1
+; you must change the rate in [modulator] ! The USRP1 does not have flexible
+; clocking
+;rate=3200000
+
; you must specify either frequency or channel
;frequency=234208000
channel=13C
-txgain=0
; possible values : internal, external, MIMO
refclk_source=internal
diff --git a/src/OutputUHD.cpp b/src/OutputUHD.cpp
index 0e50e33..cc1afd5 100644
--- a/src/OutputUHD.cpp
+++ b/src/OutputUHD.cpp
@@ -322,6 +322,7 @@ void UHDWorker::process()
if (check_refclk_loss)
{
try {
+ // TODO: Is this check specific to the B100 and USRP2 ?
if (! uwd->myUsrp->get_mboard_sensor("ref_locked", 0).to_bool()) {
uwd->logger->log(alert, "OutputUHD: External reference clock lock lost !");
if (uwd->refclk_lock_loss_behaviour == CRASH) {